[Tfug] Ethernet frame "immutables" wrt switch silicon

[Bexley Hall]

Hi Louis,

On 5/14/2013 8:14 PM, Louis Taber wrote:
> I would think a switch is more like (n^2)/2.  The size of the interconnect
> fabric grows much faster than just n.

You're assuming a mesh topology.  Depending on the implementation
technology (chip geometry, etc.), you could use a shared data path
to connect N ports on a single die with resources proportional
to N.  This would also have to be the case where a single memory
array is *shared* among all ports (since each port would need a way
of pushing frames into that memory as well as retrieving others)

If you disassemble a commercial switch, you'll see that the switch
is implemented (typ) in several "identical" smaller bits of silicon.
E.g., a 12 port switch may be three 4-port "chips" internally.

[I suspect there is a way to tease these implementation details out
of the detailed specifications for the switches if you were so
inclined]

As the network speed increases, it gets harder to use a shared
medium underlying the fabric (because the logic itself has
switching times that approach those of the network).

OTOH, switches use a *lot* of power considering how "little"
they do (discounting "smart" switches).

>> Note that the switch is a perfect example of "step and repeat" in
>> a design -- you're just doing the same thing on each of the N ports
>> so any economies in your design are immediately magnified.