[Tfug] Interchangeability of VRM's?

Bexley Hall bexley401 at yahoo.com
Wed Dec 12 10:39:04 MST 2012


Hi Adrian,

>>> More or less, there are 4 (or was that 5?) digital lines that select the
>>> output voltage.
>>
>> Are they "static"?  Or, can the processor vary them while
>> executing?  (i.e., are the 4/5 signals effectively hardwired
>> to a specific processor-specific configuration?)
>
> They could be changed dynamically, but presumably the processor would have to
> be halted during the change to prevent corruption.

Does their state affect *performance*?  I.e., does tweaking the
core voltage buy you anything -- or is it "this core *requires*
this supply voltage"?

(e.g., the performance of "classic" CMOS devices could be significantly
varied by altering their operating voltage)

> On a user-configurable
> board it could typically only be done from the BIOS setup screen. Usually it
> was set on POST before the CPU was active.

OK, so it seems to be a fixed setting (any adjustment is just
to allow a MB to support a greater variety of CPUs).  And,
it is not the CPU doing the tweaking but something else, on
its behalf (or even unbeknownst to the CPU)

E.g., I've used some devices where the *software* intentionally
tweaked supplies for itself, its subsystems or even the entire
"product" for various effects.  For example, generating a control
voltage (PWM) to drive a VCA in a PLL's feedback loop to get
"fine tuning" over the PLL's operating frequency.  Or, processors
that controlled the switching transistor in the SMPS that was
actually providing power *to* the processor (i.e., when the
software "crashes", the processor has one of two failure modes:
shut down because the power supply goes away; or, "catch fire"
because the switch was left on and the power supply voltage
rose to a level exceeding the max for the device  :> )

Your comments suggest the VRM isn;t dynamically controlled like
this (though perhaps used when the processor goes to sleep/hibernate?)

>> So, they are more a function (responsibility) of the motherboard
>> and *not* the processor.  I.e., the processor manufacturer expects
>> your "board" to provide power "per this specification" and you
>> (the MB manufacturer) are free to implement that however seems
>> best for your goals
>
> Yes, the motherboard manufacturer is responsible for meeting the
> specifications defined by the processor manufacturer. VRMs made it easy at
> the time as if one CPU required one core voltage and a later/faster CPU
> required a different core voltage, changing the core voltage profiles was as
> simple as updating the firmware.

... in the BMC?

> Back in the day (PII/PIII/Xeon) these new "low power" CPUs required a
> precisely regulated ~1-2V direct core voltage with surges up to/over 100A,

Yes.  Hence the reason you *don't* want to source the voltage at the
power supply, through long inductive traces, etc.  Locate the regulator
*at* the processor.

> instead of the direct 3.3V or 5V power supply the 386/486/Pentium chips ran.
> Using VRMs allowed the motherboard manufacturer to skip the design/validation
> intensive task of a custom core voltage regulator that would work at a
> particular core voltage that might be needed later (making an easy swap for a
> later processor if need), while simultaneously eliminating the board space
> required by building vertically.
>
> Typically what would happen is that at power-on, the baseboard management
> controller would start first (a 8081 or PIC type embedded microprocessor).
> The BMC would apply partial power to the CPUs, but not the core. At this
> point the BMC could read out the CPU ID via the I2C bus. After completing

So, the settings for the VRM are *indirectly* specified.  I.e., there
aren't 4 (or 5) "pins" on the CPU that are wired to the control inputs
on the VRM.  Rather, the CPU is identified and this determines how
the VRM is configured -- by "another party" (the BMC).  I.e., a bug
in the BMC firmware could toast a CPU!

> other house-keeping functions, the BMC would set the digital lines to the VRM
> based on its CPU ID lookup table, and then enable the VRMs, at which point
> the CPUs are "on". Alternatively, you could have the VRM lines held with
> pull-up/down resistors at power-on and then later have the CPU twiddle them

But, they would still have to be pulled to their "nominal" levels.
I.e., you can't just arbitrarily pull them all high/low as this would
tell the VRM to supply a particular voltage to the core -- that it
might not be capable of tolerating (?)

> with high-impedance output buffer circuits... but I suspect it was more often
> the former.
>
> VRMs where mostly used in higher-end and server motherboards. My old SC450NX
> quad-PIII Xeon server had 6 VRMs onboard, 1 for each processor core and 1
> each shared between CPU-pair cache. Here's is a blurb from my eBay auctions
> way back in Sep 2001 when I was selling alot of them:

OK, so they are treated as "just another component".  I.e., not
necessarily sold *with* the CPU... *or* the motherboard -- just
like the *socket* for the CPU or the bypass capacitors around it.

Thanks!  This was very informative!
--don




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