[Tfug] Processing/memory throughput and suggestions

[Jesse Allen]

On Fri, May 15, 2009 at 8:34 AM, Bexley Hall <bexley401 at yahoo.com> wrote:
> But his algorithm *expects* to take lots of misses on the *data*.
> OTOH, I suspect (?) that the actual algorithm itself WILL fit
> entirely in that 12M of cache -- *if* he can keep it there!

The whole point of going with the quad-core instead of the two
dual-cores is to drastically reduce both the miss penalty and the miss
rate for anything which is shared across cores (which I assume to be a
lot). There is no real reason to chose two dual-cores separated by a
relatively snail-like interface over four cores (now that Intel has
true quad-core) connected at the same speed as the L2 cache. No
contest.

Even with operations on large matrices (which will perform so much
faster in parallel) a shared cache will make a huge difference. I
would not worry about an increased miss rate because of contention for
space in the cache nearly as much as the increased miss rate from
performing highly parallel operations over two completely separate
CPUs.

- Jesse